rev.2.00, oct 06, 2005 page 1 of 7 hd74hc73 dual j-k flip-flops (with clear) rej03d0548-0200 (previous ade-205-420) rev.2.00 oct 06, 2005 description the flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. each flip-flop has independent, j, k, clock, and clear inputs and q and q outputs. clear is independent of the clock and accomplished by a low level on the input. features ? high speed operation: t pd (clock to q) = 18 ns typ (c l = 50 pf) ? high output current: fanout of 10 lsttl loads ? wide operating voltage: v cc = 2 to 6 v ? low input current: 1 a max ? low quiescent supply current: i cc (static) = 2 a max (ta = 25 c) ? ordering information part name package type package code (previous code) package abbreviation taping abbreviation (quantity) HD74HC73P dilp-14 pin prdp0014ab-b (dp-14av) p ? hd74hc73fpel sop-14 pin (jeita) prsp0014df-b (fp-14dav) fp el (2,000 pcs/reel) hd74hc73rpel sop-14 pin (jedec) prsp0014de-a (fp-14dnv) rp el (2,500 pcs/reel) note: please consult the sales office for the above package availability. function table inputs outputs clear clock j k q q l x x x l h h l l no change h l h l h h h l h l l h h toggle h l x x no change h h x x no change h x x no change h : high level l : low level x : irrelevant
hd74hc73 rev.2.00, oct 06, 2005 page 2 of 7 pin arrangement 1 2 3 4 5 6 7 1ck 1clr 1k v cc 2ck 2clr 2j 1j 1 q 1q gnd 2k 2q 2 q 14 13 12 11 10 9 8 (top view) j q q clr clr k ck k q q j ck logic diagram (1/2) clr ck ck ck ck q q ck ck ck ck ck ck ck j k absolute maximum ratings item symbol ratings unit supply voltage range v cc ?0.5 to 7.0 v input / output voltage vin, vout ?0.5 to v cc +0.5 v input / output diode current i ik , i ok 20 ma output current i o 25 ma v cc , gnd current i cc or i gnd 50 ma power dissipation p t 500 mw storage temperature tstg ?65 to +150 c note: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
hd74hc73 rev.2.00, oct 06, 2005 page 3 of 7 recommended operating conditions item symbol ratings unit conditions supply voltage v cc 2 to 6 v input / output voltage v in , v out 0 to v cc v operating temperature ta ?40 to 85 c 0 to 1000 v cc = 2.0 v 0 to 500 v cc = 4.5 v input rise / fall time *1 t r , t f 0 to 400 ns v cc = 6.0 v note: 1. this item guarantees maximum limit when one input switches. waveform: refer to test circuit of switching characteristics. electrical characteristics ta = 25 c ta = ?40 to+85 c item symbol v cc (v) min typ max min max unit test conditions 2.0 1.5 ? ? 1.5 ? 4.5 3.15 ? ? 3.15 ? v ih 6.0 4.2 ? ? 4.2 ? v 2.0 ? ? 0.5 ? 0.5 4.5 ? ? 1.35 ? 1.35 input voltage v il 6.0 ? ? 1.8 ? 1.8 v 2.0 1.9 2.0 ? 1.9 ? 4.5 4.4 4.5 ? 4.4 ? 6.0 5.9 6.0 ? 5.9 ? i oh = ?20 a 4.5 4.18 ? ? 4.13 ? i oh = ?4 ma v oh 6.0 5.68 ? ? 5.63 ? v vin = v ih or v il i oh = ?5.2 ma 2.0 ? 0.0 0.1 ? 0.1 4.5 ? 0.0 0.1 ? 0.1 6.0 ? 0.0 0.1 ? 0.1 i ol = 20 a 4.5 ? ? 0.26 ? 0.33 i ol = 4 ma output voltage v ol 6.0 ? ? 0.26 ? 0.33 v vin = v ih or v il i ol = 5.2 ma input current iin 6.0 ? ? 0.1 ? 1.0 a vin = v cc or gnd quiescent supply current i cc 6.0 ? ? 2.0 ? 20 a vin = v cc or gnd, iout = 0 a switching characteristics (c l = 50 pf, input t r = t f = 6 ns) ta = 25 c ta = ?40 to +85 c item symbol v cc (v) min typ max min max unit test conditions 2.0 ? ? 6 ? 5 4.5 ? ? 30 ? 24 maximum clock frequency f max 6.0 ? ? 35 ? 28 mhz 2.0 ? ? 150 ? 190 4.5 ? 18 30 ? 38 6.0 ? ? 26 ? 33 ns clock to q or q 2.0 ? ? 140 ? 175 4.5 ? 18 28 ? 35 propagation delay time t plh , t phl 6.0 ? ? 24 ? 30 ns clear to q or q 2.0 80 ? ? 100 ? 4.5 16 8 ? 20 ? pulse width t w 6.0 14 ? ? 17 ? ns clock, clear
hd74hc73 rev.2.00, oct 06, 2005 page 4 of 7 switching characteristics (c l = 50 pf, input t r = t f = 6 ns) ta = 25c ta = ?40 to +85c item symbol v cc (v) min typ max min max unit test conditions 2.0 100 ? ? 125 ? 4.5 20 3 ? 25 ? setup time t su 6.0 17 ? ? 21 ? ns data to clock 2.0 5 ? ? 5 ? 4.5 5 ?2 ? 5 ? hold time t h 6.0 5 ? ? 5 ? ns clock to data 2.0 100 ? ? 125 ? 4.5 20 ?3 ? 25 ? removal time t rem 6.0 17 ? ? 21 ? ns clear to clock 2.0 ? ? 75 ? 95 4.5 ? 5 15 ? 19 output rise/fall time t tlh , t thl 6.0 ? ? 13 ? 16 ns input capacitance cin ? ? 5 10 ? 10 pf test circuit v cc clock v cc z out = 50 ? input clear z out = 50 ? input c l = 50 pf output c l = 50 pf output q q j k note: c includes the probe and jig capacitance. l pulse generator pulse generator see function table
hd74hc73 rev.2.00, oct 06, 2005 page 5 of 7 waveforms t phl v oh v ol 0 v v cc v oh v ol t plh 50 % 50 % 50 % 50 % 10 % 90 % clear q q 10 % 90 % t r t f 0 v v cc v oh clock q or q q or q 50 % 10 % 90 % t r 10 % t f 50 % 50 % 50 % t w (l) t w (h) 10 % 90 % t tlh 10 % t thl 90 % 10 % 90 % t tlh 10 % t thl 50 % 50 % 50 % 50 % t phl t plh t phl t plh v ol v oh v ol 0 v v cc 10 % 50 % 50 % 10 % 90 % clock t r t f t w(clock) t w(clear) 90 % 10 % 90 % t tlh 10 % t thl 90 % ? waveform ? 1 1. input waveform: prr 1 mhz, zo = 50 ? , t r 6 ns, t f 6 ns 2. the output are measured one at a time with one transition per measurement. notes: ? waveform ? 2
hd74hc73 rev.2.00, oct 06, 2005 page 6 of 7 package dimensions ( ni/pd/au plating ) 7.62 dp-14av renesas code jeita package code previous code max nom min dimension in millimeters symbol reference 19.2 6.3 5.06 mass[typ.] a z b d e a b c e l 1 1 p 3 e 0.51 0.56 1.30 0.19 0.25 0.31 2.29 2.54 2.79 0 15 prdp0014ab-b p-dip14-6.3x19.2-2.54 20.32 7.4 0.40 0.48 2.39 2.54 0.97g 8 14 7 1 p 3 1 1 b d e e z b la a c e 14 8 7 f * 1 * 2 * 3 p m x y 1 e index mark b a z h e d terminal cross section ( ni/pd/au plating ) p b c 1 1 detail f l l a prsp0014de-a p-sop14-3.95x8.65-1.27 a l e e c b d e a b c x y h z l 2 1 1 e 1 mass[typ.] 0.13g 8.65 1.08 0.25 0 8 6.10 0.15 0.20 0.25 0.46 0.10 0.14 0.25 3.95 0.40 0.60 1.27 1.75 reference symbol dimension in millimeters min nom max previous code jeita package code renesas code fp-14dnv 9.05 1 a p 0.34 0.40 6.20 5.80 1.27 0.15 0.635 note) 1. dimensions" * 1 (nom)"and" * 2" do not include mold flash. 2. dimension" * 3"does not include trim offset.
hd74hc73 rev.2.00, oct 06, 2005 page 7 of 7 1.42 0.15 1.27 7.50 8.00 0.40 0.34 p a 1 10.5 fp-14dav renesas code jeita package code previous code max nom min dimension in millimeters symbol reference 2.20 0.90 0.70 0.50 5.50 0.20 0.10 0.00 0.46 0.25 0.20 0.15 7.80 8 0 0.12 1.15 10.06 0.23g mass[typ.] 1 e 1 1 2 l z h y x c b a e d b c e l a p-sop14-5.5x10.06-1.27 prsp0014df-b index mark e 1 * 2 * 1 7 14 8 f * 3 p m x y d e h z b a p terminal cross section ( ni/pd/au plating ) b c detail f 1 1 l l a note) 1. dimensions" * 1 (nom)"and" * 2" do not include mold flash. 2. dimension" * 3"does not include trim offset. e
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